Integrated circuits are made possible by processes which produce intricately patterned material layers on substrate surfaces. Producing patterned material on a substrate involves the use of controlled methods for removal of exposed material. Chemical etching is used for a variety of purposes including transferring a pattern in photoresist into underlying layers, thinning layers or thinning lateral dimensions of features already present on the surface. Etch processes which etch one material faster than another, for example, can enable a pattern transfer process to proceed more quickly and/or more efficiently. Such etch processes are said to be selective to the first material. As a result of the diversity of materials, circuits and processes, etch processes have been developed with a selectivity towards a variety of materials.
One conventional etch process is a plasma assisted dry etch process which involves the simultaneous exposure of a substrate to H2, NF3, and NH3 plasma by-products. The etch is largely conformal and selective towards silicon oxide layers but does not readily etch silicon regardless of whether the silicon is amorphous, crystalline, or polycrystalline. The selectivity provides advantages for certain applications, such as shallow trench isolation (STI) and inter-layer dielectric (ILD) recess formation.
The above-described etch process produces solid by-products which grow on the surface of the substrate as substrate material is removed. The solid by-products are subsequently removed via sublimation when the temperature of the substrate is raised during an annealing cycle. However, the inventors have observed that as technology shrinks to 32 nm trench widths and 100 nm depths (and beyond), the dimensions of these solid by-products become non-negligible compared with the smallest dimension of the trench. The appreciable size of the solid by-products may pose challenges relating to bottom clean efficiency (BCE), which is determined by the ratio of silicon dioxide removed at the bottom of a trench to the silicon dioxide removed in the top field zone. For example, the inventors herein have observed that when a single etch cycle is followed by a single annealing cycle to obtain one or more 100 nm-scale trenches, the BCE achieved is on the order of about 50% or so.
The inventors herein propose improved methods for etching a material layer.